/*
 * Copyright 2019, Data61, CSIRO (ABN 41 687 119 230)
 *
 * SPDX-License-Identifier: BSD-2-Clause
 */
#pragma once

#include <assert.h>

/* This is the starting input pin on the GIC where the LIC IRQs are connected.
 * The LIC IRQs are connected to the next 288 starting from this pin.
 */
#define GIC_LIC_INTID_BASE      (32)
#define TX2_IRQ_PPI_VTIMER      (27)

enum IRQConstants {
    TX2_TOP_TKE_SHARED0 = GIC_LIC_INTID_BASE,
    TX2_TOP_TKE_SHARED1,
    TX2_TOP_TKE_SHARED2,
    TX2_TOP_TKE_SHARED3,
    TX2_TOP_TKE_SHARED4,
    TX2_TOP_TKE_SHARED5,
    TX2_TOP_TKE_SHARED6,
    TX2_TOP_TKE_SHARED7,
    TX2_TOP_TKE_SHARED8,
    TX2_TOP_TKE_SHARED9,
    TX2_RTC,
    TX2_LIC_GTE_0,
    TX2_LIC_GTE_1,
    TX2_AON_GTE,
    TX2_BPMP_WDT_REMOTE, /* 14 */
    TX2_SPE_WDT_REMOTE,
    TX2_SCE_WDT_REMOTE,
    TX2_TOP_WDT_REMOTE,
    TX2_AOWDT_REMOTE,
    TX2_RESERVED_19,
    TX2_DSIA,
    TX2_DSIB,
    TX2_DSIC,
    TX2_DSID,
    TX2_RESERVED_24,
    TX2_I2C,
    TX2_I2C2,
    TX2_I2C3,
    TX2_I2C4,
    TX2_I2C5,
    TX2_I2C6,
    TX2_I2C7,
    TX2_I2C8,
    TX2_I2C9,
    TX2_I2C10,
    TX2_QSPI,
    TX2_SPI1,
    TX2_SPI2,
    TX2_SPI3,
    TX2_SPI4,
    TX2_CAN1_0,
    TX2_CAN1_1,
    TX2_CAN2_0,
    TX2_CAN2_1,
    TX2_UFSHC,
    TX2_GPIO0_0, /* 45 */
    TX2_GPIO0_1,
    TX2_GPIO0_2,
    TX2_GPIO1_0,
    TX2_GPIO1_1,
    TX2_GPIO1_2,
    TX2_GPIO2_0,
    TX2_GPIO2_1,
    TX2_GPIO2_2,
    TX2_GPIO3_0,
    TX2_GPIO3_1,
    TX2_GPIO3_2,
    TX2_GPIO4_0,
    TX2_GPIO4_1,
    TX2_GPIO4_2,
    TX2_AON_GPIO_0,
    TX2_AON_GPIO_1,
    TX2_SDMMC1,
    TX2_SDMMC2,
    TX2_SDMMC3,
    TX2_SDMMC4,
    TX2_SDMMC1_SYS,
    TX2_SDMMC2_SYS,
    TX2_SDMMC3_SYS,
    TX2_SDMMC4_SYS,
    TX2_GPU_STALL,
    TX2_GPU_NONSTALL,
    TX2_PCIE_INT,
    TX2_PCIE_MSI,
    TX2_PCIE_WAKE,
    TX2_CENTRAL_DMA_CH0, /* 75 */
    TX2_CENTRAL_DMA_CH1,
    TX2_CENTRAL_DMA_CH2,
    TX2_CENTRAL_DMA_CH3,
    TX2_CENTRAL_DMA_CH4,
    TX2_CENTRAL_DMA_CH5,
    TX2_CENTRAL_DMA_CH6,
    TX2_CENTRAL_DMA_CH7,
    TX2_CENTRAL_DMA_CH8,
    TX2_CENTRAL_DMA_CH9,
    TX2_CENTRAL_DMA_CH10,
    TX2_CENTRAL_DMA_CH11,
    TX2_CENTRAL_DMA_CH12,
    TX2_CENTRAL_DMA_CH13,
    TX2_CENTRAL_DMA_CH14,
    TX2_CENTRAL_DMA_CH15,
    TX2_CENTRAL_DMA_CH16,
    TX2_CENTRAL_DMA_CH17,
    TX2_CENTRAL_DMA_CH18,
    TX2_CENTRAL_DMA_CH19,
    TX2_CENTRAL_DMA_CH20,
    TX2_CENTRAL_DMA_CH21,
    TX2_CENTRAL_DMA_CH22,
    TX2_CENTRAL_DMA_CH23,
    TX2_CENTRAL_DMA_CH24,
    TX2_CENTRAL_DMA_CH25,
    TX2_CENTRAL_DMA_CH26,
    TX2_CENTRAL_DMA_CH27,
    TX2_CENTRAL_DMA_CH28,
    TX2_CENTRAL_DMA_CH29,
    TX2_CENTRAL_DMA_CH30,
    TX2_CENTRAL_DMA_CH31,
    TX2_CENTRAL_DMA_COMMON,
    TX2_SIMON0,
    TX2_SIMON1,
    TX2_SIMON2,
    TX2_SIMON3,
    TX2_UARTA, /* 112 */
    TX2_UARTB,
    TX2_UARTC,
    TX2_UARTD,
    TX2_UARTE,
    TX2_UARTF,
    TX2_UARTG,
    TX2_NVCSI,
    maxIRQ                          = GIC_LIC_INTID_BASE + 287
} platform_interrupt_t;

/* I went down and copied out the values page by page, so in order to ensure
 * that I didn't miss anything, I'm asserting the values at the top of each page
 * to ensure there's no human error.
 */
static_assert((TX2_TOP_TKE_SHARED0 - GIC_LIC_INTID_BASE) == 0, "tx2_irqs_page1");
static_assert((TX2_BPMP_WDT_REMOTE - GIC_LIC_INTID_BASE) == 14, "tx2_irqs_page2");
static_assert((TX2_GPIO0_0 - GIC_LIC_INTID_BASE) == 45, "tx2_irqs_page3");
static_assert((TX2_CENTRAL_DMA_CH0 - GIC_LIC_INTID_BASE) == 75, "tx2_irqs_page4");
static_assert((TX2_UARTA - GIC_LIC_INTID_BASE) == 112, "tx2_irqs_page5");

#define MAX_IRQ                       maxIRQ


static const int linux_pt_irqs[] = {
};

static const int free_plat_interrupts[] = { 220 + GIC_LIC_INTID_BASE };

/* This address pertains to guest-vm@f1000000 in the overlay DTS. */
#define LINUX_RAM_BASE    0xF1000000
#define LINUX_RAM_PADDR_BASE LINUX_RAM_BASE
#define LINUX_RAM_OFFSET  (LINUX_RAM_PADDR_BASE - LINUX_RAM_BASE)
#define LINUX_RAM_SIZE    0x8000000

#define DTB_ADDR          (LINUX_RAM_BASE + 0x01000000)
#define INITRD_MAX_SIZE   0x1900000 //25 MB
#define INITRD_ADDR       (DTB_ADDR - INITRD_MAX_SIZE) //0x80700000
#define GIC_IRQ_PHANDLE 0x1

static const char *plat_keep_devices[] = {
    "/arm-pmu",
    "/denver-pmu",
    "/aliases",
    "/spi@3210000",
    "/spi@3230000",
    "/spi@3240000",
    "/pwm@3280000",
    "/pwm@3290000",
    "/pwm@32a0000",
    "/pwm@c340000",
    "/serial@3100000",
    "/serial@3110000",
    "/serial@c280000",
    "/serial@3130000",
    "/combined-uart",
    "/interrupt-controller",
    "/tegra-rtcpu-trace",
    "/tegra_safety_ivc",
    "/tegra-aon-ivc-echo",
    "/aondbg",
    "/timer",
    "/rtc@c2a0000",
    "/tegra-carveouts",
    "/mc_sid@2c00000",
    "/smmu_test",
    "/mc",
    "/usb_cd",
    "/mailbox@3538000",
    "/xotg",
    "/xhci@3530000",
    "/xudc@3550000",
    "/kfuse@0x3830000",
    "/tachometer@39c0000",
    "/interrupt-controller@3881000",
    "/tegra186-pm-irq",
    "/timer@3020000",
    "/clock@5000000",
    "/se_elp@3ad0000",
    "/tegra-hsp@c150000",
    "/tegra-hsp@3c00000",
    "/dma@2600000",
    "/adma@2930000",
    "/agic-controller@2a41000",
    "/hda@3510000",
    "/adsp@2993000",
    "/tegra_fiq_debugger",
    "/mttcan@c310000",
    "/mttcan@c320000",
    "/cpuidle",
    "/cpufreq@e070000",
    "/bwmgr",
    "/hardwood",
    "/cluster_clk_priv@e090000",
    "/axi2apb@2390000",
    "/axi2apb@23a0000",
    "/axi2apb@23b0000",
    "/axi2apb@23c0000",
    "/axi2apb@23d0000",
    "/axip2p@2100000",
    "/axip2p@2110000",
    "/axip2p@2120000",
    "/axip2p@2130000",
    "/axip2p@2140000",
    "/axip2p@2150000",
    "/axip2p@2160000",
    "/axip2p@2170000",
    "/axip2p@2180000",
    "/axip2p@2190000",
    "/tegra-serr",
    "/tegra-firmwares",
    "/tegra-mce",
    "/nvdumper",
    "/hsp_top",
    "/pfsd",
    "/pwm-fan",
    "/thermal-fan-est",
    "/vi-bypass@15700000",
    "/tegra_cec",
    "/soft_watchdog",
    "/bluedroid_pm",
    "/e3326_lens_ov5693@P5V27C",
    "/lens_imx274@A6V26",
    "/bcmdhd_wlan",
    "/sdhci@3420000",
    "/ufshci@2450000",
    "/pwm@32c0000",
    "/pwm@32d0000",
    "/pwm@32e0000",
    "/pwm@32f0000",
    "/serial@3150000",
    "/serial@c290000",
    "/ether_qos_virt_test@2490000",
    "/trusty",
    "/rtcpu@2993000",
    "/sce@b000000",
    "/aon_spi@c260000",
    "/mttcan0-ivc",
    "/mttcan1-ivc",
    "/reserved-memory/generic_carveout",
    "/max16984-cdp",
    "/pmc@c370000",
    "/pmc-iopower",
    "/interrupt-controller@3000000",
    "/spi@3270000",
    "/tegra-hsp@b150000",
    "/chipid@100000",
    "/miscreg@00100000",
    "/sound_ref",
    "/eqos_ape@2990000",
    "/watchdog@30c0000",
    "/roc-flush@e080000",
    "/generic-system-config",
    "/dpaux0",
    "/dpaux1",
    "/tegra-pmc-blink-pwm",
    "/dummy-cool-dev",
    "/bcmdhd_pcie_wlan",
};
static const char *plat_keep_device_and_disable[] = {
};
static const char *plat_keep_device_and_subtree[] = {
    "/sdhci@3460000",
    "/sdhci@3440000",
    "/sdhci@3420000",
    "/sdhci@3400000",
    "/pinmux@2430000",
    "/ahci-sata@3507000",
    "/ufshci@2450000",
    "/i2c@3160000",
    "/i2c@c240000",
    "/i2c@3180000",
    "/i2c@3190000",
    "/bpmp_i2c",
    "/i2c@31b0000",
    "/i2c@31c0000",
    "/i2c@c250000",
    "/i2c@31e0000",
    "/spdif_dit",
    "/spi@c260000",
    "/ether_qos@2490000",
    "/power-domain",
    "/trusty",
    "/thermal-zones",
    "/rtcpu@b000000",
    "/sce-ivc-channels",
    "/rtcpu@2993000",
    "/ape-ivc-channels",
    "/sce@b000000",
    "/actmon@d230000",
    "/aon@c160000",
    "/reserved-memory",
    "/iommu@12000000",
    "/pinctrl@3520000",
    "/host1x",
    "/mipical",
    "/bpmp",
    "/gpio@2200000",
    "/gpio@c2f0000",
    "/pcie-controller@10003000",
    "/sound",
    "/ahub",
    "/adsp_audio",
    "/clocks",
    "/stm@8070000",
    "/ptm@9840000",
    "/ptm@9940000",
    "/ptm@9a40000",
    "/ptm@9b40000",
    "/ptm_bpmp@8a1c000",
    "/funnel_bccplex@9010000",
    "/funnel_major@8010000",
    "/replicator@0x8040000",
    "/etf@8030000",
    "/tpiu@8060000",
    "/etr@8050000",
    "/funnel_minor@8820000",
    "/efuse@3820000",
    "/i2c@31a0000",
    "/csi_mipical",
    "/fixed-regulators",
    "/external-connection",
    "/backlight",
    "/mods-simple-bus",
    "/tfesd",
    "/bthrot_cdev",
    "/gpio-keys",
    "/tegra-camera-platform",
    "/plugin-manager",
    "/eeprom-manager",
    "/firmware",
    "/psci"
};
static const char *plat_keep_device_and_subtree_and_disable[] = {};
